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  #1  
Old 06-17-2003, 06:06 AM
Janak Parekh
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Default ARM Updates Thumb Instruction Set

http://news.com.com/2100-1037_3-101...tag=fd_nbs_comm

"ARM is getting a new Thumb. The Cambridge, England-based chip designer unveiled on Monday a set of processor instructions designed to help cell phones run faster and consume less energy. ARM's Thumb 2 instructions update the company's original Thumb instructions, a subset of commands inside the overall ARM architecture, the basic architecture behind the chips running most cell phones on the market today."

For those of who haven't taken a Computer Engineering Architecture Design course, it won't be immediately clear what this means. Here's an attempt at a brief explanation. ARM is an interesting Instruction Set Architecture (ISA), because most modern ARM cores encapsulate two different instruction sets: the full 32-bit instruction set, and a "reduced" 16-bit instruction set, called Thumb, that offers much of the same functionality, but requires less bits to represent an instruction. This is a useful feature in embedded devices, like cell phones and PDAs, since a 16-bit instruction takes about half the space of a 32-bit instruction. As the article cites, use of these shorter instructions when possible typically reduces code footprint by about 26%, and correspondingly speed (less bits to move around). That's pretty substantial when you're talking ROM sizes in the kilobytes or megabytes.

Now, what does Thumb-2 contain? This is a very good question, and one that I couldn't figure out by poking around ARM's site. It seems they don't have much Thumb-2 documentation yet (if someone finds it, let me know). If I had to guess, I'd say they're updating the Thumb instruction set (which was introduced alongside the full ARM4 set) to support new ARMv5 or ARMv6 instructions. If someone has more information, please feel free to contribute!

Last - what would this have to do with the Pocket PC? Well, as far as I can tell, Pocket PC doesn't currently use Thumb, based on Chris De Herrera's discussion about XScale optimization; if that's the case, it's highly probable that the short-term effect is "not much" for us. Moreover, I'm reasonably certain that Intel's StrongARM and XScale processors only support the "original" Thumb, not Thumb-2. On the other hand, ARM's Thumb instruction set (Oh, and was the pun intended? Most likely...) is an important tool for smaller embedded devices, and will likely continue to be so.

If you haven't totally lost your mind by this point, feel free to ask questions in the thread below. If you have more information on the subject, that's greatly appreciated too.
 
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Old 06-17-2003, 07:27 AM
ctmagnus
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Interesting name. Imagine where we'd be without thumbs. And no comments about hitchhiking, please. :wink:
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Old 06-17-2003, 02:59 PM
Pony99CA
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Default Thumbs Up!

Quote:
Originally Posted by ctmagnus
Interesting name. Imagine where we'd be without thumbs.
Hopefully nobody here has their thumb up their, well, never mind. :way to go:

Steve
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Old 06-17-2003, 09:10 PM
ctmagnus
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Default Re: Thumbs Up!

Quote:
Originally Posted by Pony99CA
Hopefully nobody here has their thumb up their, well, never mind. :way to go:

Steve
Which brings up the point that here are no emoticons here with evident noses. :mrgreen:
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Old 06-18-2003, 04:58 AM
Kati Compton
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So the instructions are smaller, which leads directly to smaller executable size. But lower power and faster execution? This must mean that they operate on smaller data words, no? I mean, if just the bits encoding the instruction itself and not the data are fewer, it shouldn't affect anything but code size. As for faster, either they have to change the clock speed or the # of cycles it takes to execute the instructions on the smaller data. Or execute multiple of them simultaneously.

How do you get faster execution here with less power? They're generally inversely related if compared on the same architecture....
 
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Old 06-18-2003, 05:04 AM
Janak Parekh
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Quote:
Originally Posted by kati42
But lower power and faster execution? This must mean that they operate on smaller data words, no?
I'd suspect it depends on your code/data mix. If you're working with small amounts of data, instruction fetch may dominate parts of the computation process. At least, that's my guess, for small cell-phone-sized devices where much of the currently operating data is already in registers. And perhaps the CPI for IF in Thumb mode is less? I never really checked this out.

Quote:
How do you get faster execution here with less power? They're generally inversely related if compared on the same architecture....
Well, as I'm implying, the simpler mantra. But I'm not the expert here.

--janak
 
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Old 06-18-2003, 05:19 AM
Kati Compton
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Quote:
Originally Posted by Janak Parekh
Quote:
Originally Posted by kati42
But lower power and faster execution? This must mean that they operate on smaller data words, no?
I'd suspect it depends on your code/data mix. If you're working with small amounts of data, instruction fetch may dominate parts of the computation process.
That sounds like a reasonable guess.
 
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