Jason Dunn
11-11-2002, 07:39 PM
<a href="http://www.samsungelectronics.com/semiconductors/System_LSI/32_bit_ARM_based_RISC_MPU/PDA/S3C2410X/s3c2410x.htm">http://www.samsungelectronics.com/semiconductors/System_LSI/32_bit_ARM_based_RISC_MPU/PDA/S3C2410X/s3c2410x.htm</a><br /><br />The truly hardcore among you will enjoy this link. Downloads galore, PDF files, and a great deal of low-level information on this device. It's all starting to come together now - Samsung announced their ARM processor a couple of weeks ago, and this looks like a variation on it. By taking the "system on a chip approach", they're able to drive down costs further. This is too geeky even for me to know, but how does this chip compare to the Intel Xscale processor in terms of what functionality it brings to the device?<br /><br />Regarding the future of this device, I just heard back from a Microsoft PR person, and there are no announcements as to partnerships at this time. Pricing will depend on who partners with Samsung, but I was told that the pricing would be at levels matching or beating the lowest Pocket PC prices today (Dell and Viewsonic).<br /><br />"SAMSUNG's S3C2410X01 16/32-bit RISC microprocessor is designed to provide a cost-effective, low power, small die size and high performance micro-controller solution for hand-held devices and general applications. To reduce total system cost, S3C2410X01 also provides the following : separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD controller(STN & TFT), NAND Flash Boot loader, System Manager(chip select logic, SDRAM controller), 3-ch UART with handshake, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8- ch 10-bit ADC and Touch screen interface, IIC-BUS interface, IIS-BUS interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch ch SPI and PLL for clock generation."<!><br /><br />"The S3C2410X01 was developed using an ARM920T core, 0.18um CMOS standard cells and a memory complier. Its low-power, simple , elegant and fully static design is particularly suitable for cost-sensitive and power sensitive applications. Also S3C2410X01 adopts a new bus architecture, AMBA (Advanced Microcontroller Bus Architecture) An outstanding feature of the S3C2410X01 is its CPU core, a 16/32-bit ARM920T RISC processor designed by Advanced RISC Machines, Ltd. The ARM920T implements MMU, AMBA BUS, and Harvard cache architecture with separate 16KB instruction and 16KB data caches, each with a 8-word line length.<br />By providing complete set of common system peripherals, the S3C2410X01 minimizes overall system costs and eliminates the need to configure additional components. The integrated on-chip functions that are described in this document include:<br /><br />• 1.8V internal, 1.8V/2.5V/3.3V memory, 3.3V external I/O <br />microprocessor with 16KB I-Cache, 16KB D-Cache, and MMU.<br />• External memory controller. (SDRAM Control, Chip Select logic)<br />• LCD controller (up to 4K color STN and 64K color TFT) with 1-ch <br />LCD-dedicated DMA.<br />• 4-ch DMAs with external request pins <br />• 3-ch UART with handshake(IrDA1.0, 16-byte FIFO) / 1-ch SPI<br />• 1-ch multi-master IIC-BUS/1-ch IIS-BUS controller <br />• SD Host interface version 1.0 & Multi-Media Card Protocol <br />version 2.11 compatible<br />• 2-port USB Host /1- port USB Device(ver 1.1)<br />• 4-ch PWM timers & 1-ch internal timer<br />• Watch Dog Timer<br />• 117-bit general purpose I/O ports / 24-ch external interrupt source <br />• Power control: Normal, Slow, Idle, Stop and Power-off mode<br />8-ch 10-bit ADC and Touch screen interface.<br />• RTC with calendar function.<br />• On-chip clock generator with PLL"